The Automated Test Blog

Embedded.com recently published an article by an engineer at On Semiconductor about their use of PXI and LabVIEW for the characterization benches.  In the article, Ray Morgan describes the benefits of this system over previous approaches, saying, among other things that “the PXI platform set a new standard for semiconductor design validation, breaking many of the paradigms and constraints of previous testing methodologies”.

I found the article particularly inersting as it articulates some common challenges I’ve been seeing in semiconductor characterization that I believe PXI and LabVIEW are very well-suited to solve.  We are, in fact, seeing a major uptick in the use of these platforms in applications such as these.  Another technolgy that I believe will be important in these applications is the user-programmable FPGA.  I discussed this trend in a previous post on Protocol Aware ATE.

As I stated in my last blog post, I’m planning to discuss one of three industry trends per blog entry over the next few weeks. My 3rd and final trend is:

Expansion of Wireless and Protocol-Aware Test
In addition to emerging technological advances, software-defined instrumentation has proved ideal for rapid-growth areas such as wireless and protocol-aware test. For example, consumer electronics devices including cell phones and automotive in-dash entertainment systems often integrate multiple communication protocols and standards such as GSM, GPS, and WLAN. Test engineers using traditional instruments rely on vendors to develop dedicated, stand-alone instruments to test each standard. With software-defined instruments, engineers and researchers can test multiple standards using common modular hardware components and implement emerging and custom wireless protocols and algorithms in their test systems regardless of the maturity of a new wireless standard.

For example, Dr. Umberto Spagnolini at the Polytechnic Institute of Milan is using LabVIEW to prototype algorithms for emerging standards such as WiMAX. Researchers such as Dr. Spagnolini can directly control system parameters, including channel coding, power, and modulation scheme, while adding fading and multipath interference to determine system immunity as a prototype of emerging WiMAX algorithms.

In the semiconductor industry, the demand for increasingly functionality and integration continues unabated.  As a result, semiconductor companies are heavily investing in complex systems on a chip (SoCs) and systems in a package (SiPs) technologies. It is often difficult to fully verify these devices using traditional ATE, which has led to an increased demand for so-called protocol aware test or the ability to test devices by emulating the real-world signals connected to them.

These increasing requirements for semiconductor test and the need to reduce total test costs have led industry organizations such as the Semiconductor Test Consortium (STC) and the newly founded Collaborative Alliance for Semiconductor Test (CAST) to investigate standards around open test architectures that support the integration of modular, software-defined instrumentation such as PXI into traditional semiconductor ATE. By using software-defined, FPGA-based instrumentation in these semiconductor test systems, engineers can achieve real-time responses with the standard pin electronics found in traditional ATE, lowering the total cost of test through better use-case coverage and improving the user’s ability to debug failures.

As I stated in my last blog post, I’m planning to discuss one of three industry trends per blog entry over the next few weeks. My 2nd trend is:

Trend#2: Increased Adoption of Parallel Processing Technologies

Multicore technology has become a standard feature in automated test systems and a necessity for today’s electronic devices that are processing unprecedented amounts of data. Software-defined instrumentation takes advantage of the latest multicore processors and high-speed bus technologies to generate, capture, analyze and process the gigabytes of data required to properly design and test electronic devices. Multicore architectures can present a challenge when used with traditional text-based programming environments that are not inherently parallel and require low-level programming techniques. However, test engineers quickly can realize the benefits of multicore technology through inherently higher level programming environments such as LabVIEW, which automatically distributes multithreaded applications across multiple computing cores for maximum performance and throughput.

Many test engineers I talk to are already experiencing the challenge of programming multicore in that, for the first time, they are not seeing an increase in test system performance when updating the PC in the system. In fact, due to the potentially slower clock rates of many multicore processors, their systems may actually run slower!

On the other hand, Alejandro Torres, senior manufacturing test engineer at Sanmina-SCI, provided an example of the potential business benefits attained by using programming tools tuned for multicore technology when he stated, “By leveraging the multicore technology in LabVIEW and the latest NI multicore PXI embedded controller, we were able to increase our test throughput by one additional workday per week. Best of all, we achieved this throughput increase by simply upgrading from a previous-generation PXI single-core embedded controller to the latest NI PXI multicore embedded controller with only minimal changes to our code.”

Another area of growth for software-defined instrumentation is the increase in system-level design tools for FPGAs. Many modular instruments now come equipped with FPGAs, including several released in the past year that offer the high-performance Xilinx Virtex-5 FPGA. These FPGA-based instruments provide test engineers with the ability to implement more complex digital signal processing at faster rates than ever before. Because software programs such as LabVIEW give test engineers the ability to program FPGAs without requiring knowledge of VHDL, the performance benefits of FPGAs are no longer limited to a subset of hardware engineers with extensive knowledge in digital design.

Next week, I’ll post on the third trend, the Expansion of Wireless and Protocol-Aware Test.

Yes, its 2009 and time again to make some predictions about the technologies and trends that I think will shape our industry this year.  Of course, making predictions for the rest of this year right now is a pretty risky proposition. But, one thing I know to be true is that in a tough economy, you have to be able to do more with fewer resources. Test and measurement often comes under particular scrutiny in an economic down cycle, and test engineers will need to be prepared to optimize our approach to verification and production test, or even look at alternatives to our existing test engineering strategies

These demands have led to three major trends that I believe will significantly influence the Test and Measurement industry over the next year. Instead of blogging them all here today, I will share one per entry over the next few weeks.

Trend#1: Growth of Software-Defined Instrumentation

The adoption of software-defined instrumentation is the most significant trend in test and measurement for 2009. Software-defined instruments, also known as virtual instruments, consist of modular hardware and user-defined software that give engineers the ability to combine standard and user-defined measurements with custom data processing using common hardware components. This flexibility has become critical as electronic devices such as next-generation navigation systems and smart phones integrate diverse capabilities and rapidly adopt new communication standards. Using software-defined instruments, engineers rapidly can reconfigure their test equipment by modifying software algorithms to meet changing test requirements.

In addition, engineers are using software-defined instrumentation to achieve new levels of measurement performance and lower test costs by applying the latest technological advancements such as multicore processors and field-programmable gate arrays (FPGAs) in their test systems to meet the demands of new application areas such as wireless and protocol-aware test.

Because of the flexibility and cost-effectiveness of this approach, thousands of companies are adopting software-defined instrumentation and industry standards that build on this approach continue to grow, even in the difficult world economy.  For example, according to the PXI Systems Alliance, more than 100,000 PXI systems will be deployed by the end of 2009, and the number of deployed PXI systems is expected to double in the next decade.

Jessy Cavazos, test and measurement industry manager at Frost & Sullivan, recently confirmed that PXI is influencing this trend when she stated, “The open, modular architecture of software-defined instruments such as those in PXI have proven beneficial to a wide range of industries, and, as a result, PXI revenue in measurement and automation is expected to grow at 17.6 percent CAGR through 2014. The performance delivered by the PXI platform has successfully addressed areas such as RF applications in radar testing, mobile phone testing and other wireless applications that were previously impossible to address with other instrumentation.”

Next week, I’ll post on the second trend, the increased adotoption of parallel technologies.

There is no doubt that we now are facing an economic headwind. Customers I’ve visited around the world are trying to understand how this headwind will affect their business and what they can do to put themselves in the best position to weather this storm, and perhaps even come out of this down cycle stronger than they are now. More and more test engineers are looking at how to optimize their approach to test more with less.

Testing more with less means that you may have to reevaluate your approach to test, and indeed, it is in disruptive conditions such as we now face that new ideas are the most prone to take hold. I believe that modular, software defined test systems provide the greatest opportunity for testing more with less – regardless of the dimension where optimization is needed. For example, optimizing the test speed of a production system is often the best path to decreasing test costs. For other applications, reconfiguring a single tester to test multiple devices yields the best results. And in very complex testers, the capital cost may the focus for cost reduction. For each of these situations, and in many others, the software-defined approach has proven time and time again to deliver dramatic improvements.

Let me share a few examples. In a production system, time is, quite literally, money. If you can reduce test time by ½, then you may be able to put half the number of testers at the end of a line. Wireless devices, in particular, are often expensive and time consuming to test. Many cellular phones are still tested with a inefficient method called “call-processing”. In this approach, a device called a “one-box tester” is used to actually simulate a phone call to the device under test. Bringing a phone up into a call is slow and is unnecessary to test if the device is correctly assembled. This would be like testing a television by watching a movie on it, instead of simply sending it a test pattern and verifying the result. More and more cellular handset manufacturers are moving to a software-defined test system that instead tests the physical layer signal of the device and uses signal processing in software to perform the necessary tests to verify each type of wireless standard. This technique is often 2-5 times faster than call-processing, which results in huge savings for the manufacturer.

Another example of achieving cost savings with a modular, software-defined approach is to use the flexibility of software to reconfigure a system to test many different types of devices. Another challenge in wireless test is that many devices have multiple wireless standards. My beloved iPhone, for example, now has 5 radios! Often, these different standards have required different instruments with their own vendor-defined measurement routines. A software-defined system can be reconfigured to test each standard with the same hardware. And when standards inevitably change and evolve, a software-defined system is in a much better position to be able to react to these changes.

A final example is in semiconductor ATE. Many semiconductor devices are tested on so-called “Big iron” testers. These testers have the sophisticated digital infrastructure and pin-electronics to test high performance semiconductors such as processors and SOCs. For simpler devices with low target prices, such as a MEMs sensor or an RFID, however, these testers may be overkill. Because they have the infrastructure to support high performance, it is difficult to scale them to these simpler requirements. A modular, open system such as PXI, though, has a very low entry cost and can be configured with only the minimum required capability, which results in lower capital expenditure.

So, in these turbulent economic times, it will be up to test engineers to innovate using the latest technology to meet the challenges of testing more with less. And those companies and individuals that do this the best will be able to come out of this difficult time stronger than before and ready to take advantage of new opportunities as conditions improve.

As recently discussed in a post by Rick Nelson of Test and Measurement World magazine, the Semiconductor Test Consortium (STC) has begun work on defining a Portable Test Instrument Module (PTIM) – a standard plug-in module for performing ancillary measurements on existing semiconductor ATE.  My colleague, Luke Schreier, delivered a presentation at the last STC global meeting that was very well-received which proposed PXI as a suitable specification to build from.   The business case is very compelling – traditional ATE architectures are built to accommodate the densest and highest speed test pins possible – 1 kilowatt of power per board is not uncommon.  This is necessary for the high speed digital electronics needed to test the latest processors, for instance.  When you need to add some audio or RF measurements into the system, however, the infrastructure can be overkill.  Moreover, to fully integrate an instrument into a tester requires expertise of the ATE vendor, so to make these measurements, the vendor may be required to invest significantly in development of measuement functionality already available on the open market, just in other form factors.

It is interesting to me that the semiconductor test industry is recognizing some of the features we designed into the original PXI specification.  In fact, one of the slides we used to use in the early days of PXI showed a set of rack and stack instruments on one side and a “big iron” semiconductor tester on the other, with PXI right in the middle.  The point was that PXI borrowedconcepts from both of these markets – the measurement quality from box instruments, and the card modular form factor and integrated timing and synchronization from semiconductor ATE.  It looks like after 10 years, its finally come full circle.

As I stated in an earlier blog post, I’m planning to discuss one of five industry trends per blog entry over the next few weeks. My 3^rd trend is:

Growing Popularity of FPGA-Enabled Instrumentation
Another area experiencing rapid expansion in the test industry is the increase in system-level tools for field-programmable gate arrays (FPGAs). FPGAs are powerful because they are inherently parallel, deterministic, and reliable and can be defined and reconfigured in software. While FPGAs are used inside many embedded designs, and even standalone instruments, users are not typically given access to reprogram them. More manufacturers are beginning to include open FPGAs on modular instruments and are giving test engineers the means in software to reprogram them according to their requirements. With this capability, test engineers can embed a custom algorithm into the device to perform in-line processing inside the FPGA or emulate part of the system that requires a real-time response. Historically, most test engineers do not have expertise to program FPGAs because they familiarity with hardware description languages like Verilog or VHDL which use low-level syntax to describe hardware behavior. New system-level tools are emerging that provide test engineers with the ability to rapidly configure FPGAs without writing low-level HDL code. LabVIEW, for example, can target onboard FPGAs and synthesize the necessary hardware directly from a graphical LabVIEW program, dramatically reducing the complexity of the code development. I’ve been amazed at the things our customers, who are often domain exprerts, but not experts in hardware design, have been able to accomplish with LabVIEW FPGA.  Examples include testing RFID devices performing bit-error-rate testing (BERT) of military communication protocols.

As I stated in my last blog, I’m planning to discuss one trend per blog entry over the next few weeks. The second trend in Test and Measurement is:

Growth of Software-Defined Instrumentation

One issue facing test engineers is that test instrumentation is not updated as rapidly as the devices being tested. The functionality of these complex devices is being defined by the software embedded in them, such as the Apple iPhone, which gives design engineers the ability to add features faster than ever before. This is increasingly challenging for many test engineers because most stand-alone instruments often lack the measurement capabilities of the most recent standards due to the fixed user interface and firmware that must be developed and embedded in them.
Thus, test engineers are turning to a software-defined approach to instrumentation which gives them the ability to quickly customize their measurement algorithms and user interfaces to meet specific application needs and integrate testing directly into the design process, further reducing development time. PXI is the example of a widely used software-defined instrumentation standard for building modular, reconfigurable high-performance automated test systems.

Kiran Unni, Frost & Sullivan Measurement & Instrumentation research manager, recently confirmed that PXI is influencing this trend when she stated, “The adoption of tools such as PXI is an indicator that companies recognize the benefits of moving toward software-defined instruments. The savings being realized in capital equipment, system development and improvements in system efficiency all contribute to reducing the per-unit cost of test, directly influencing the bottom line.”

This is the time of the year where you see a lot of people making their predictions on the hot trends in 2008 and beyond. Of course, as the old joke goes, predictions are hard, especially the ones about the future. But, anyway, here goes.

Since my company serves a very broad and diverse set of customers, I get the opportunity to talk to electronics designers and test engineers in applications ranging from medical devices manufacturing to high energy physics experimentation. The common thread that continues to resurface is that they are each facing the challenge of testing increasingly complicated designs with shrinking timelines and budgets. These demands have led to five major trends that I believe will significantly influence the Test and Measurement industry over the next three years. Instead of blogging them all here today, I will share one per entry over the next few weeks. The first trend is:

Increased Use of Multicore/Parallel Test Systems
Processor manufactures, such as Intel and AMD, have started developing processors with multiple cores on a single chip to continue realizing performance gains without increasing clock rates (otherwise, PCs would soon be doubling as ovens). With multicore processors, test engineers can develop automated test applications capable of achieving the highest possible throughput through parallel processing. However, this is not as easy as it sounds. Check out a few articles describing the challenge of multicore programming:
• The Free Lunch Is Over : A Fundamental Turn Toward Concurrency in Software
• Dearth of tools could stall multicore onslaught

The summary is that programming multicore puts fundamentally different requirements on software, and most of today’s software tools don’t have very good native and scalable ways to deal with it. Sure, you can create a multithreaded program in C and synchronize it using textual constructs, but try scaling that to 80 cores (the number Intel plans to demonstrate by 2011). Graphical languages, however, such as NI LabVIEW, are able to elegantly represent parallel concepts; in fact, LabVIEW already automatically scales programs to multiple cores and has demonstrated significant performance improvements over single core processors.

Multicore technology is not only an opportunity to increase performance, but as Herb Sutter describes in the ‘Free Lunch’ article above, the performance improvement we have taken for granted with each generation of processor may no longer hold if our programming environment does not take advantage of the parallelism.

I recently presented at a group called the Semiconductor Test Consortium, or STC. There were two subjects of the talk – learnings from PXI and other industry standards and emerging trends in SOC (System On a Chip) and SIP (System In a Package) functional testing. The latter has been the subject of some interesting discussion of late in the semiconductor test industry.

The challenge that many chip designers face is that the devices are increasing in complexity at a rate that exceeds the advances in testing technology. The result is that the cost to manufacturer complex semiconductor devices is decreasing faster than the cost to test them. In validation, the issue is not only test cost, but overall test time, which can impact the time to validate new silicon and, ultimately, time to market.

As devices begin to resemble complete systems, a higher level test methodology is called for to both reduce the tester’s complexity, as well as provide a tighter link back to the system level design tools. An engineer at Broadcom recently coined the term “Protocol Aware ATE” to describe this need and at the International Test Conference (ITC) this year, there was a panel discussion on this trend. The idea is to create a test system that can perform functional testing of a device by emulating the device in situ, or in its intended surroundings. This requires the capability to model the other components of the system and to interact with the device in real time.

This is similar in many was to functional testing that is already routinely done at the board and system levels. For some devices, this is just stimulus-response type testing performed at the end of the manufacturing process. When real-time response is needed, this is very similar to a technique called Hardware in the Loop, or HIL, used extensively in automotive and aerospace validation testing. For chip testing, the real time requirements are often more stringent. A technology that has promise to meet many of these requirements is the Field Programmable Gate Array (FGPA), also noted as an ideal architecture in the Broadcom paper. A programmable FPGA placed in the tester close to the device under test, can be used to emulate the system and test the device in situ. The FPGA also holds promise as a target that can run system models directly from system level design tools to bring design and test closer together.